Course Focus

"Every individual would possess as many as 100 chips and deal with many more in future !"
Chip design in India has been identified as a prominent industry to support the already achieved development in IT field. With growing design houses day by day, a large pool of highly skilled individuals is needed to meet this demand. But, a potential gap was evident in the expectations of the industry and the output from academic institutions.
Realizing this need for trained manpower, C-DAC has launched a Certificate in Digital and Analog VLSI Design ( CDAD ) with emphasis on Digital and Analog CMOS circuit design, VLSI design flows, verification and testing. This course will be effective in providing potential engineers with exposure to both front-end and back-end processes in VLSI Design.

Course Structure

Certificate in Digital and Analog VLSI Design ( CDAD ) is a 20 week full-time course consisting of five modules, an industry relevant project and a seminar. Daily sessions comprise two hours of lecture followed by four hours of lab work.

CDAD Course Syllabus

Analog and Digital Design
• CMOS Technology : Device structure,Operation and Fabrication Process Steps
• Analog circuit design and simulation, Analog circuit analysis (DC analysis, AC analysis, Transient analysis)
• Interconnect modeling and simulation, Power simulation and estimation, Device scaling, Delay / Area / Voltage scaling, Noise analysis and Modeling, Domino circuit design.
• Combinational ans sequential logic design, Finite state machines(FSM) analysis and synthesis, ALU, AGU, Register file and cache design, Pipeline techniques.
  ASIC Design
• Introduction,Design flow and architectures of ASIC and FPGA
• ASIC Technical Specification : Signal table,Functional description,Worst-Case timing, Testability constructs, Electrical characteristics, DC characteristics, IDDQ testing, AC characteristics, BURN-IN,Delta limits, Physical characteristics, Device statistics
• ASIC Design Tool Flow : Design partition, Design capture, Design synthesis, Design simulation, Design analysis, Design for test, Design layout, Design verification,Test generation.
• ASIC Review Process : Specifications/Requirements Review,Implementation(Schematic) Review,Preliminary Design Review(PDR), Critical Design Review, Chip sign-off Review.
  VLSI Design Verification and Testing
• Logic verification principles, VLSI testing process,Defects, Faults, Fault Models, Delay faults
• Combinational ATPG, Testability Measures, Sequential ATPG
• Simulation and fault simulation
• Defect-based Testing, Boundary scan, DFT, BIST
• Mixed Signal Testing
  Performance Specific VLSI Design
• I/O PAD Design, Clock Gating and Low Power Design, Asynchronous VLSI Design, Performance + Power and Performance + Frequency Metrics, Timing analysis, Timing estimations and convergence, Noise / Power issues in high speed design, Timing Melioration techniques ( Judicious Buffering, Fanout Reduction, Micro-Architecture changes)
  C programming and scripting
• Pointers, functions, structures and unions, file i/o, linux commands, shell programming, tcl
  Project and Seminar The students are assigned a project work for the duration of one month. Also, as a part of the curriculum, they are required to deliver a seminar on a topic relevant to vlsi. Special credit is given for the project work and seminar.

Eligibility

Engineering Degree (UG/PG) with first class in Electronics / Electrical / Electronics & Communication / Electronics & Instrumentation or M.Sc Electronics with first class in final degree

Prerequisite

All applicants should possess sound knowledge in Electronic Circuits, Analog & Digital Circuits, Microprocessors, Computer Architecture, Basics of Data Communication & Networking. It is important that the applicants possess good aptitude and communication skills

Application Form

The applicant can fill up the application form for the Common Entrance Test (CET) online. The non-refundable registration fee of Rs.250/- for the CET is to be paid by Demand Draft drawn on any Nationalized bank in favor of “C-DAC” payable at “Hyderabad” and send to:

To
The Co-ordinator (CDAD)
Centre for Development of Advanced Computing (C-DAC)
IInd Floor, Delta Chambers, Ameerpet, Hyderabad-500016
Tel: 040-23401331/2

Selection Process

There are two stages in selecting the students for C-DAD course.
Stage-I: Applicants will undergo an Entrance Test. The pattern of the test will be mainly objective type covering various technical and aptitude aspects. The duration of the test will be 90 minutes. Top candidates in proportion to number of seats will be considered for the process of Stage-II.
Stage-II: Candidates will undergo technical and personal interviews. Candidates will be selected based on performance in Stage-I and Stage - II.

Course Highlights

• Creative learning environment
• Resourceful faculty
• Unique Curriculum
• Quality Course Content
• Well-equipped Laboratory & Library
• Extensive hands-on sessions
• Cooperative learning

Course Fee

The course fee is Rs. 45,000/- (Rupees Forty Five Thousand only).

CET Syllabus for CDAD course

• C Programming and Data Structures: Constants, Data Types, Variables, Operators and Expressions, Control Flow - if, if-else, switch, for & while statements, functions, Arrays and Pointers, Structures and Unions, Input & Output in C, Preprocessor directives, Bit wise operators & Bit-fields, Data Structures - Linked Lists, Stacks, Queues, Trees, Graphs, Searching & Sorting Algorithms.
  
  
• Operating System Concepts: Introduction to Operating Systems (OS), Process Management - Process Concepts, Scheduling Algorithms, Inter process Communication, Memory Management - Memory allocation problems, Paging, Segmentation, Virtual Memory, Page Replacement Algorithms, Thrashing & Working Set Model, File System Management, Secondary Storage Management, Device Management and File Protection & Security.
  
  
• Electronics: Semiconductor Electronics, Electronic Devices, Analog Integrated Circuits, Op-Amps, Comparators.
  
  
• Digital Design: Boolean Algebra, Logic Gates, Multiplexes, Decoders, Code Converters, Design and Minimization Techniques, Latches and Flip-flops, Counters, Shift-Registers, Comparators, Timers, Multivibrators, Finite State Machines (FSM) Design and Minimization techniques, Microprocessors (x86 architecture), Assembly Language Programming, Memory and I/O interfacing.
  
  
• Data Communication and Networking: Basics of Data Communication, Switching, Multiplexing, Demultiplexing, Synchronous/Asynchronous Communication , OSI and TCP/IP Protocol Suites, LAN Topologies and Protocols (Ethernet-CSMA/CD, Token Ring, Token bus protocols), WAN Protocols (HDLC, X.25, Frame Relay, ISDN).
  
  
• Aptitude Test: The Aptitude Test will be conducted on the GRE/GMAT pattern. The questions will test the applicant's Quantitative Aptitude, Analytical Ability and Vocabulary of the English Language and written communication skills
  

Recommended Books

The CDAD Course is currently offered at:

• HYDERABAD
  C-DAC
  Nalanda Building
  No. 1 Shivabagh
  Satyam Theatre Road
  Ameerpet, Hyderabad - 500016
  Andhra Pradesh (India)
  Phones:+91-40-23737124/25
  Fax:+91-040-23743382